Current File : //lib/modules/6.14.0-1012-aws/build/include/dt-bindings/clock/mediatek,mt6735-pericfg.h

/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */

#ifndef _DT_BINDINGS_CLK_MT6735_PERICFG_H
#define _DT_BINDINGS_CLK_MT6735_PERICFG_H

#define CLK_PERI_DISP_PWM		0
#define CLK_PERI_THERM			1
#define CLK_PERI_PWM1			2
#define CLK_PERI_PWM2			3
#define CLK_PERI_PWM3			4
#define CLK_PERI_PWM4			5
#define CLK_PERI_PWM5			6
#define CLK_PERI_PWM6			7
#define CLK_PERI_PWM7			8
#define CLK_PERI_PWM			9
#define CLK_PERI_USB0			10
#define CLK_PERI_IRDA			11
#define CLK_PERI_APDMA			12
#define CLK_PERI_MSDC30_0		13
#define CLK_PERI_MSDC30_1		14
#define CLK_PERI_MSDC30_2		15
#define CLK_PERI_MSDC30_3		16
#define CLK_PERI_UART0			17
#define CLK_PERI_UART1			18
#define CLK_PERI_UART2			19
#define CLK_PERI_UART3			20
#define CLK_PERI_UART4			21
#define CLK_PERI_BTIF			22
#define CLK_PERI_I2C0			23
#define CLK_PERI_I2C1			24
#define CLK_PERI_I2C2			25
#define CLK_PERI_I2C3			26
#define CLK_PERI_AUXADC			27
#define CLK_PERI_SPI0			28
#define CLK_PERI_IRTX			29

#endif